NI PCI-7813R
该设备还使用TRIG1启动预触发的DAQ操作。在大多数预触发应用程序中，TRIG1由软件触发器生成。有关在预触发DAQ操作中使用TRIG1和TRIG2的完整说明，请参阅TRIG2信号说明。TRIG2信号任何PFI引脚均可接收TRIG2信号作为输入，该信号可作为PFI1/TRIG2引脚的输出。TRIG2与DAQ序列的关系见图4-10。作为输入，TRIG2配置为边缘检测模式。您可以选择任何PFI引脚作为TRIG2的源，并为上升沿或下降沿配置极性选择。TRIG2的选定边缘启动预触发DAQ序列的后触发阶段。在预触发模式下，TRIG1信号启动数据采集。扫描计数器（SC）指示识别TRIG2之前的小扫描次数。SC减至零后，将加载要采集的触发后扫描数，同时继续采集。如果在SC递减为零之前断言TRIG2，则设备忽略TRIG2。收到TRIG2的选定边缘后，设备获取固定数量的上升边缘极性下降边缘极性t w t w=10 ns小t w t w=25-50 ns第4章连接信号©National Instruments Corporation 4-21 NI PCI-6110/6111用户手册扫描和采集停止。此模式在接收TRIG2之前和之后都会获取数据。作为输出，TRIG2在预触发采集序列中反映后触发，即使另一个PFI正在外部触发采集。TRIG2不用于后触发数据采集。输出为有源高脉冲，脉冲宽度为25至50 ns。该输出在启动时设置为高阻抗。图4-13和4-14显示了TRIG2的定时要求。

The device also uses TRIG1 to initiate pretriggered DAQ operations. In most pretriggered applications, TRIG1 is generated by a software trigger. Refer to the TRIG2 signal description for a complete description of the use of TRIG1 and TRIG2 in a pretriggered DAQ operation. TRIG2 Signal Any PFI pin can receive as an input the TRIG2 signal, which is available as an output on the PFI1/TRIG2 pin. Refer to Figure 4-10 for the relationship of TRIG2 to the DAQ sequence. As an input, TRIG2 is configured in the edge-detection mode. You can select any PFI pin as the source for TRIG2 and configure the polarity selection for either rising or falling edge. The selected edge of TRIG2 initiates the posttriggered phase of a pretriggered DAQ sequence. In pretriggered mode, the TRIG1 signal initiates the data acquisition. The scan counter (SC) indicates the minimum number of scans before TRIG2 can be recognized. After the SC decrements to zero, it is loaded with the number of posttrigger scans to acquire while the acquisition continues. The device ignores TRIG2 if it is asserted prior to the SC decrementing to zero. After the selected edge of TRIG2 is received, the device acquires a fixed number Rising-edge polarity Falling-edge polarity t w t w = 10 ns minimum t w t w = 25-50 ns Chapter 4 Connecting Signals © National Instruments Corporation 4-21 NI PCI-6110/6111 User Manual of scans and the acquisition stops. This mode acquires data both before and after receiving TRIG2. As an output, TRIG2 reflects the posttrigger in a pretriggered acquisition sequence even if another PFI is externally triggering the acquisition. TRIG2 is not used in posttriggered data acquisition. The output is an active high pulse with a pulse width of 25 to 50 ns. This output is set to high impedance at startup. Figures 4-13 and 4-14 show the timing requirements for TRIG2.