VMIVME-2128
计时器4宽32位，从位于BAR2地址偏移量0x18处的计时器4加载计数寄存器（TMRLCR4）获取其加载计数。该寄存器中的位映射如下：写入该字段时，定时器4在定时器时钟的下一个上升沿加载写入值，无论定时器是启用还是禁用。存储在该寄存器中的值也会在计时器的终端计数（或超时）时自动重新加载。计时器1和2当前计数寄存器（TMRCCR12）计时器1和2的当前计数可通过位于BAR2中地址偏移量0x20处的计时器1和2当前计数寄存器（TMRCCR12）读取。该寄存器中的位映射如下：读取任一字段时，当前计数值被锁存并返回。根据WDT控制状态寄存器（CSR2）中“读取锁存选择”位的设置，有两种模式可确定如何锁存计数。有关这两种模式的更多信息，请参阅CSR2寄存器说明。定时器3电流计数寄存器（TMRCCR3）定时器3的电流计数可通过位于BAR2地址偏移量0x24处的定时器3电流计数寄存器（TMRCCR3）读取。该寄存器中的位映射如下：字段位读取或写入计时器4加载计数TMRLCR4[31..0]R/W字段位读取或写入计时器2计数TMRCCR12[31..16]R.O。计时器1计数TMRCCR12[15..0]R.O。

Timer 4 is 32-bits wide and obtains its load count from the Timer 4 Load Count Register (TMRLCR4), located at offset 0x18 from the address in BAR2. The mapping of bits in this register are as follows: When this field is written, Timer 4 is loaded with the written value on the next rising edge of the timer clock, regardless of whether the timer is enabled or disabled. The value stored in this register is also automatically reloaded on terminal count (or timeout) of the timer. Timer 1 & 2 Current Count Register (TMRCCR12) The current count of timers 1 & 2 may be read via the Timer 1 & 2 Current Count Register (TMRCCR12), located at offset 0x20 from the address in BAR2. The mapping of bits in this register are as follows: When either field is read, the current count value is latched and returned. There are two modes that determine how the count is latched depending on the setting of the “Read Latch Select” bit in the WDT Control Status Register (CSR2). See the CSR2 register description for more information on these two modes. Timer 3 Current Count Register (TMRCCR3) The current count of Timer 3 may be read via the Timer 3 Current Count Register (TMRCCR3), located at offset 0x24 from the address in BAR2. The mapping of bits in this register are as follows: Field Bits Read or Write Timer 4 Load Count TMRLCR4[31..0] R/W Field Bits Read or Write Timer 2 Count TMRCCR12[31..16] R.O. Timer 1 Count TMRCCR12[15..0] R.O.